/**
  ******************************************************************************
  * @file    zb32l03x_hal_i2s.h
  * @author  MCD Application Team
  * @Version V2.0.0
  * @Date    2022/08/23
  * @brief   Header file of I2S HAL module.
  ******************************************************************************
**/

#ifndef __ZB32L03x_HAL_I2S_H
#define __ZB32L03x_HAL_I2S_H

#ifdef __cplusplus
extern "C" {
#endif

#include "zb32l03x_hal_def.h"

/** @defgroup I2S_Exported_Types I2S Exported Types
  * @{
  */
typedef enum
{
    I2S_MODE_SLAVE_TX             = (0x00000000U),
    I2S_MODE_SLAVE_RX             = (0x1UL << SPI_I2SCFGR_I2SCFG_Pos),
    I2S_MODE_MASTER_TX            = (0x2UL << SPI_I2SCFGR_I2SCFG_Pos),
    I2S_MODE_MASTER_RX            = ((0x1UL << SPI_I2SCFGR_I2SCFG_Pos) | (0x2UL << SPI_I2SCFGR_I2SCFG_Pos))
}I2S_ModeTypeDef;

typedef enum
{
    I2S_STANDARD_PHILIPS          = (0x00000000U),
    I2S_STANDARD_MSB              = (0x1UL << SPI_I2SCFGR_I2SSTD_Pos),
    I2S_STANDARD_LSB              = (0x2UL << SPI_I2SCFGR_I2SSTD_Pos),
    I2S_STANDARD_PCM_SHORT        = ((0x1UL << SPI_I2SCFGR_I2SSTD_Pos) | (0x2UL << SPI_I2SCFGR_I2SSTD_Pos)),
    I2S_STANDARD_PCM_LONG         = ((0x1UL << SPI_I2SCFGR_I2SSTD_Pos) | (0x2UL << SPI_I2SCFGR_I2SSTD_Pos) | SPI_I2SCFGR_PCMSYNC)
}I2S_StandardTypeDef;

typedef enum
{
    I2S_DATAFORMAT_16B            = (0x00000000U),
    I2S_DATAFORMAT_16B_EXTENDED   = (SPI_I2SCFGR_CHLEN),
    I2S_DATAFORMAT_24B            = ((SPI_I2SCFGR_CHLEN | (0x1UL << SPI_I2SCFGR_DATLEN_Pos))),
    I2S_DATAFORMAT_32B            = ((SPI_I2SCFGR_CHLEN | (0x2UL << SPI_I2SCFGR_DATLEN_Pos)))
}I2S_DataFormatTypeDef;

typedef enum
{
    I2S_MCLKOUTPUT_ENABLE         = (SPI_I2SPR_MCKOE),
    I2S_MCLKOUTPUT_DISABLE        = (0x00000000U)
}I2S_MCLKOutputTypeDef;

typedef enum
{
    I2S_AUDIOFREQ_192K            = (192000U),
    I2S_AUDIOFREQ_96K             = (96000U),
    I2S_AUDIOFREQ_48K             = (48000U),
    I2S_AUDIOFREQ_44K             = (44100U),
    I2S_AUDIOFREQ_32K             = (32000U),
    I2S_AUDIOFREQ_22K             = (22050U),
    I2S_AUDIOFREQ_16K             = (16000U),
    I2S_AUDIOFREQ_11K             = (11025U),
    I2S_AUDIOFREQ_8K              = (8000U),
    I2S_AUDIOFREQ_DEFAULT         = (2U)
}I2S_AudioFreqTypeDef;

typedef enum
{
    I2S_CPOL_LOW                  = (0x00000000U),
    I2S_CPOL_HIGH                 = (SPI_I2SCFGR_CKPOL)
}I2S_ClockPolarityTypeDef;


/**
  * @brief I2S Init structure definition
  */
typedef struct
{
    I2S_ModeTypeDef           Mode;                /*!< Specifies the I2S operating mode.
                                                    This parameter can be a value of @ref I2S_ModeTypeDef */

    I2S_StandardTypeDef       Standard;            /*!< Specifies the standard used for the I2S communication.
                                                    This parameter can be a value of @ref I2S_StandardTypeDef */

    I2S_DataFormatTypeDef     DataFormat;          /*!< Specifies the data format for the I2S communication.
                                                    This parameter can be a value of @ref I2S_DataFormatTypeDef */

    I2S_MCLKOutputTypeDef     MCLKOutput;          /*!< Specifies whether the I2S MCLK output is enabled or not.
                                                    This parameter can be a value of @ref I2S_MCLKOutputTypeDef */

    I2S_AudioFreqTypeDef      AudioFreq;           /*!< Specifies the frequency selected for the I2S communication.
                                                    This parameter can be a value of @ref I2S_AudioFreqTypeDef */

    I2S_ClockPolarityTypeDef  CPOL;                /*!< Specifies the idle state of the I2S clock.
                                                    This parameter can be a value of @ref I2S_ClockPolarityTypeDef */
} I2S_InitTypeDef;

/**
  * @brief  HAL State structures definition
  */
typedef enum
{
    HAL_I2S_STATE_RESET      = 0x00U,  /*!< I2S not yet initialized or disabled                */
    HAL_I2S_STATE_READY      = 0x01U,  /*!< I2S initialized and ready for use                  */
    HAL_I2S_STATE_BUSY       = 0x02U,  /*!< I2S internal process is ongoing                    */
    HAL_I2S_STATE_BUSY_TX    = 0x03U,  /*!< Data Transmission process is ongoing               */
    HAL_I2S_STATE_BUSY_RX    = 0x04U,  /*!< Data Reception process is ongoing                  */
    HAL_I2S_STATE_TIMEOUT    = 0x06U,  /*!< I2S timeout state                                  */
    HAL_I2S_STATE_ERROR      = 0x07U   /*!< I2S error state                                    */
} HAL_I2S_StateTypeDef;

/**
  * @brief I2S handle Structure definition
  */

typedef struct
{
    SPI_TypeDef                *Instance;    /*!< I2S registers base address */

    I2S_InitTypeDef            Init;         /*!< I2S communication parameters */

    uint16_t                   *pTxBuffPtr;  /*!< Pointer to I2S Tx transfer buffer */

    __IO uint16_t              TxXferSize;   /*!< I2S Tx transfer size */

    __IO uint16_t              TxXferCount;  /*!< I2S Tx transfer Counter */

    uint16_t                   *pRxBuffPtr;  /*!< Pointer to I2S Rx transfer buffer */

    __IO uint16_t              RxXferSize;   /*!< I2S Rx transfer size */

    __IO uint16_t              RxXferCount;  /*!< I2S Rx transfer counter
                                              (This field is initialized at the
                                               same value as transfer size at the
                                               beginning of the transfer and
                                               decremented when a sample is received
                                               NbSamplesReceived = RxBufferSize-RxBufferCount) */
    HAL_DMA_Handle_TypeDef     *pHDMA;

    __IO HAL_LockTypeDef       Lock;         /*!< I2S locking object */

    __IO HAL_I2S_StateTypeDef  State;        /*!< I2S communication state */

    __IO uint32_t              ErrorCode;    /*!< I2S Error code
                                                This parameter can be a value of @ref I2S_Error */
} I2S_HandleTypeDef;
/**
  * @}
  */

/** @defgroup I2S_Exported_Constants I2S Exported Constants
  * @{
  */
/** @defgroup I2S_Error I2S Error
  * @{
  */
#define HAL_I2S_ERROR_NONE               (0x00000000U)  /*!< No error                    */
#define HAL_I2S_ERROR_TIMEOUT            (0x00000001U)  /*!< Timeout error               */
#define HAL_I2S_ERROR_OVR                (0x00000002U)  /*!< OVR error                   */
#define HAL_I2S_ERROR_UDR                (0x00000004U)  /*!< UDR error                   */
#define HAL_I2S_ERROR_DMA                (0x00000008U)  /*!< DMA transfer error          */
#define HAL_I2S_ERROR_PRESCALER          (0x00000010U)  /*!< Prescaler Calculation error */
/**
  * @}
  */


/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
  * @{
  */
#define I2S_IT_TXE                       SPI_CR2_TXEIE
#define I2S_IT_RXNE                      SPI_CR2_RXNEIE
#define I2S_IT_ERR                       SPI_CR2_ERRIE
/**
  * @}
  */

/** @defgroup I2S_Flags_Definition I2S Flags Definition
  * @{
  */
#define I2S_FLAG_TXE                     SPI_SR_TXE
#define I2S_FLAG_RXNE                    SPI_SR_RXNE

#define I2S_FLAG_UDR                     SPI_SR_UDR
#define I2S_FLAG_OVR                     SPI_SR_OVR
#define I2S_FLAG_FRE                     SPI_SR_FRE

#define I2S_FLAG_CHSIDE                  SPI_SR_CHSIDE
#define I2S_FLAG_BSY                     SPI_SR_BSY

#define I2S_FLAG_MASK                   (SPI_SR_RXNE\
                                         | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_CHSIDE | SPI_SR_BSY)
/**
  * @}
  */


/** @defgroup I2S_Exported_Macros I2S Exported Macros
  * @{
  */

/** @brief  Reset I2S handle state
  * @param  __HANDLE__ specifies the I2S Handle.
  * @retval None
  */
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)

/** @brief  Ready I2S handle state.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_I2S_READY_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_READY)

/** @brief  Enable/Disable the specified SPI peripheral (in I2S mode).
  * @param  __HANDLE__ specifies the I2S Handle.
  * @retval None
  */
#define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))

/** @brief  Enable/Disable I2S full duplex mode.
  * @param  __HANDLE__ specifies the I2S Handle.
  * @retval None
  */
#define __HAL_I2S_FULL_DUPLEX_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SFD))
#define __HAL_I2S_FULL_DUPLEX_DISABLE(__HANDLE__)   (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SFD))

/** @brief  Enable/Disable the specified I2S interrupts.
  * @param  __HANDLE__ specifies the I2S Handle.
  * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
  *         This parameter can be one of the following values:
  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg I2S_IT_ERR: Error interrupt enable
  * @retval None
  */
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__)   (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))


/** @brief  Enable/Disable the specified SPI DMA requeat.
  * @param  __HANDLE__ specifies the SPI handle.
  * @param  __DMA_REQUEST__ specifies the requeat source to disable.
  *         This parameter can be one of the following values:
  *            @arg SPI_CR2_TXDMAEN: DMA Tx buffer enable
  *            @arg SPI_CR2_RXDMAEN: DMA RX buffer enable
  * @retval None
  */
#define __HAL_I2S_ENABLE_DMA_REQUEST(__HANDLE__, __DMA_REQUEST__)  SET_BIT((__HANDLE__)->Instance->CR2, (__DMA_REQUEST__))
#define __HAL_I2S_DISABLE_DMA_REQUEST(__HANDLE__, __DMA_REQUEST__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__DMA_REQUEST__))

/** @brief  Checks if the specified I2S interrupt source is enabled or disabled.
  * @param  __HANDLE__ specifies the I2S Handle.
  * @param  __INTERRUPT__ specifies the I2S interrupt source to check.
  *          This parameter can be one of the following values:
  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg I2S_IT_ERR: Error interrupt enable
  * @retval The new state of __IT__ (TRUE or FALSE).
  */
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
                                                              & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

/** @brief  Checks whether the specified I2S flag is set or not.
  * @param  __HANDLE__ specifies the I2S Handle.
  * @param  __FLAG__ specifies the flag to check.
  *         This parameter can be one of the following values:
  *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
  *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
  *            @arg I2S_FLAG_UDR: Underrun flag
  *            @arg I2S_FLAG_OVR: Overrun flag
  *            @arg I2S_FLAG_FRE: Frame error flag
  *            @arg I2S_FLAG_CHSIDE: Channel Side flag
  *            @arg I2S_FLAG_BSY: Busy flag
  * @retval The new state of __FLAG__ (TRUE or FALSE).
  */
#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))

/** @brief Clears the I2S OVR pending flag.
  * @param  __HANDLE__ specifies the I2S Handle.
  * @retval None
  */
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
                                                __IO uint32_t tmpreg_ovr = 0x00U; \
                                                tmpreg_ovr = (__HANDLE__)->Instance->DR; \
                                                tmpreg_ovr = (__HANDLE__)->Instance->SR; \
                                                UNUSED(tmpreg_ovr); \
                                              }while(0U)
/** @brief Clears the I2S UDR pending flag.
  * @param  __HANDLE__ specifies the I2S Handle.
  * @retval None
  */
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
                                                __IO uint32_t tmpreg_udr = 0x00U;\
                                                tmpreg_udr = ((__HANDLE__)->Instance->SR);\
                                                UNUSED(tmpreg_udr); \
                                              }while(0U)


/** @brief  Check whether the specified SPI flag is set or not.
  * @param  __SR__  copy of I2S SR regsiter.
  * @param  __FLAG__ specifies the flag to check.
  *         This parameter can be one of the following values:
  *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
  *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
  *            @arg I2S_FLAG_UDR: Underrun error flag
  *            @arg I2S_FLAG_OVR: Overrun flag
  *            @arg I2S_FLAG_CHSIDE: Channel side flag
  *            @arg I2S_FLAG_BSY: Busy flag
  * @retval SET or RESET.
  */
#define I2S_CHECK_FLAG(__SR__, __FLAG__)         ((((__SR__)\
                                                    & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)

/** @brief  Check whether the specified SPI Interrupt is set or not.
  * @param  __CR2__  copy of I2S CR2 regsiter.
  * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
  *         This parameter can be one of the following values:
  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg I2S_IT_ERR: Error interrupt enable
  * @retval SET or RESET.
  */
#define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__)      ((((__CR2__)\
                                                            & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

/** @brief  CHECK the parameter used init
  * @param
  * @retval None
  */
#define IS_I2S_ALL_INSTANCE(INSTANCE)       ((INSTANCE) == SPI)

#define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX)  || \
                               ((__MODE__) == I2S_MODE_SLAVE_RX)  || \
                               ((__MODE__) == I2S_MODE_MASTER_TX) || \
                               ((__MODE__) == I2S_MODE_MASTER_RX))

#define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS)   || \
                                       ((__STANDARD__) == I2S_STANDARD_MSB)       || \
                                       ((__STANDARD__) == I2S_STANDARD_LSB)       || \
                                       ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
                                       ((__STANDARD__) == I2S_STANDARD_PCM_LONG))

#define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B)          || \
                                        ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
                                        ((__FORMAT__) == I2S_DATAFORMAT_24B)          || \
                                        ((__FORMAT__) == I2S_DATAFORMAT_32B))

#define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
                                        ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))

#define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K)    && \
                                      ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
                                     ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))

#define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
                               ((__CPOL__) == I2S_CPOL_HIGH))

/**
  * @}
  */


/* Initialization/de-initialization functions ********************************/
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *pHI2s);
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *pHI2s);

/* MSP functions  *************************************************************/
void HAL_I2S_MspInit(I2S_HandleTypeDef *pHI2s);
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *pHI2s);


HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *pHI2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *pHI2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);

HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *pHI2s, uint16_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *pHI2s, uint16_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *pHI2s, uint16_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *pHI2s, uint16_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *pHI2s);
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *pHI2s);
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *pHI2s);
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *pHI2s);

void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *pHI2s);
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *pHI2s);
void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *pHI2s);

HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *pHI2s);
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *pHI2s);

/**
  * @}
  */

#ifdef __cplusplus
}
#endif

#endif /* ZB32L03x_HAL_I2S_H */


